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Rambus announced that Rambus has demonstrated its PCI Express (PCIe) 5.0 digital controller IP on leading FPGA platforms. PCIe 5.0 performance at 32 GT/s in FPGAs is using a soft controller. This capability expands the use models of FPGAs by enabling multi-instance, switching and bridging applications and accelerates the performance of FPGAs used in defense, networking, and test and measurement markets.
“We’ve achieved a new industry benchmark with the demonstration our PCIe 5.0 controller operating at 32 GT/s on popular FPGA platforms,” said Scott Houghton, general manager of Interface IP at Rambus. “With the growing importance of FPGAs in markets from defense to the data center, this solution developed by the newly-acquired PLDA team expands the Rambus portfolio and offers the next level of performance for mission-critical applications.”
Features of the Rambus PCIe 5.0 digital controller
- Verified on leading FPGA platforms
- Supports up to 32 GT/s data rates
- Backwards compatible to PCIe 4.0 and 3.1/3.0
- Supports Endpoint, Root-port, Dual-mode, and Switch-port configurations
- Supports up to 64 Physical Functions (PF), 512 Virtual Functions (VF)
- Supports AER, ECRC, ECC, MSI, MSI-X, multi-function, crosslink, DOE, CMA over DOE, and other optional features and ECNs
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